Blog · June 12, 2026 · XSI-AIMS Atlas™

Why does XSI-AIMS™ have eight kinds of memory?

It is the first question every architect asks about the XSI-AIMS memory model — and the answer runs from a 180× latency spread in the published literature to the difference between agents you can debug and agents you can only re-run.

The question

Why does XSI-AIMS have eight kinds of memory? Every architect asks it within minutes of opening the memory section of the spec, because one store has always felt like enough — the RAG pipeline has a vector database (similarity-ranked retrieval over documents), the chat product has a session buffer, and both ship. So why does XSI-AIMS, an open standard for agent governance, define seven core memory subsystems plus an optional spatial profile — eight distinct contracts in all?

Because the stores are not interchangeable, and the published numbers say so. In the MemGraphRAG team's KDD 2026 evaluation (arXiv:2606.00610), their graph store retrieved answers to multi-hop questions in 0.061 seconds per query — while LightRAG, run on the same benchmarks, took 11.052 seconds, with HippoRAG between them at 1.586. That is a roughly 180× spread across published memory architectures doing nominally the same job. Memory architecture is not an implementation detail: it is the difference between an agent that answers and an agent that stalls.

The bus

Same query, same stores — every time.

One name spans all eight without being a store: TMS, the Trust and Memory Provenance Subsystem. It is the bus — trust assignments, provenance records, and the promotion and consolidation contract that moves raw episodes into consolidated ones and gated lessons into procedure. Backends are swappable, per subsystem, declared at registration. The bus is not swappable. That asymmetry is deliberate, because the bus is where determinism lives: the XSI-AIMS memory contract guarantees that the same query, from the same agent, under the same declaration, routes to the same stores — every time — and the guarantee holds because routing, promotion, and provenance run through one governed contract rather than eight private ones.

Determinism reads like a small property until an incident lands. An agent misbehaves at 02:00 — was the failure in the model, the prompt, or what the agent remembered? If memory retrieval is nondeterministic, you cannot replay the incident, only re-run it and hope the same memories surface. And the evidence says memory errors do not correct themselves: in Yonsei University's harness-optimizer evaluation (Shor, arXiv:2605.22505), 94.4% of non-prompt harness errors (the memory, tool, and workflow class) persisted into the final harness. Errors in memory compound silently, and a deterministic routing layer is what makes them findable.

Structure pays on capability, not just operations. A University of Wisconsin–Madison study (arXiv:2604.13151) measured what happens when an agent's working state is externalized into structured harness state instead of raw context history: task success moved from 51.9% to 88.9% on Gemini-3.1-Flash-Lite and from 63.0% to 92.6% on GPT-4.1 — a 30 to 37 percentage-point gain, with no weight changes. Their result, not ours — and direct support for treating memory as a structured, governed surface rather than an accumulating transcript.

Where Atlas fits

One interface. Routed by declaration.

XSI-AIMS Atlas is the commercial memory routing engine XSI builds on this contract. Agents call one interface and declare the subsystem — Atlas routes each call to the right store and the right backend. Backends are swappable per subsystem, declared at registration — the bus is not, and Atlas honors both halves of that contract. The spec defines what each subsystem must guarantee, the implementer chooses how, and the declaration is recorded to the public XSI-AIMS agent registry for conformance audit. Memory contents are never exposed — the declaration of capability is. That split is deliberate. XSI-AIMS is an open standard that tells you what the memory contract is, and Atlas is how XSI runs it at production scale.

The answer

So — why does XSI-AIMS have eight kinds of memory? Wrong question, it turns out. The 180× latency spread, the 94.4% error persistence, the two teams independently splitting working from episodic memory: all of it points the other way. The real question is why anyone thought one store was enough.

If you are running agents at a scale where memory routing is a real decision, talk to us.